Package Info

iverilog


Simulation and synthesis tool for IEEE-1364


Productivity/Scientific/Electronics

Icarus Verilog is a Verilog compiler that generates a variety of engineering formats, including simulation. It strives to be true to the IEEE-1364 standard.


License: GPL-2.0+
URL: http://iverilog.icarus.com/

Categories

Releases

Package Version Update ID Released Package Hub Version Platforms Subpackages
10.1-bp150.2.4 info GA Release 2018-07-30 15
  • ppc64le
  • s390x
  • x86-64
  • iverilog
  • iverilog-devel
10.1-bp150.2.5 info GA Release 2018-07-30 15
  • AArch64
  • iverilog
  • iverilog-devel
10.1-bp151.2.15 info GA Release 2019-05-18 15 SP1
  • ppc64le
  • iverilog
  • iverilog-devel
10.1-bp151.3.1 info GA Release 2019-07-17 15 SP1
  • AArch64
  • s390x
  • x86-64
  • iverilog
  • iverilog-devel
10.1-bp152.3.14 info GA Release 2020-05-10 15 SP2
  • AArch64
  • ppc64le
  • s390x
  • x86-64
  • iverilog
  • iverilog-devel
10.1-bp153.1.18 info GA Release 2021-03-06 15 SP3
  • AArch64
  • ppc64le
  • s390x
  • x86-64
  • iverilog
  • iverilog-devel