ADMS is a code generator that converts electrical compact device models specified in high-level description language into ready-to-compile C code for the API of SPICE simulators. Based on transformations specified in XML language, ADMS transforms Verilog-AMS code into other target languages.
Package Version | Update ID | Released | Package Hub Version | Platforms | Subpackages |
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2.3.7-bp156.3.6 info | GA Release | 2024-05-13 | 15 SP6 |
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2.3.7-bp155.2.11 info | GA Release | 2023-05-17 | 15 SP5 |
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2.3.7-bp154.1.22 info | GA Release | 2022-05-09 | 15 SP4 |
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2.3.5-bp153.1.17 info | GA Release | 2021-03-06 | 15 SP3 |
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2.3.5-bp152.3.14 info | GA Release | 2020-04-16 | 15 SP2 |
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2.3.5-bp151.3.1 info | GA Release | 2019-07-16 | 15 SP1 |
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2.3.5-bp151.2.15 info | GA Release | 2019-05-18 | 15 SP1 |
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2.3.5-bp150.2.5 info | GA Release | 2018-07-30 | 15 |
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2.3.5-bp150.2.4 info | GA Release | 2018-07-30 | 15 |
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